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PSO-N/PQFN PINOUTS STANDARDIZED FOR 14-, 16-, 20-, AND 24-LEAD LOGIC FUNCTIONS
Pages: 11
Publication date: 2006-03-01
STANDARD TEST LOADS FOR DUAL-SUPPLY LEVEL TRANSLATION DEVICES
Pages: 9
Publication date: 2005-11-01
SON/QFN PACKAGE PINOUTS STANDARDIZED FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONS
Publication date: 2004-07-01
STANDARD FOR DESCRIPTION OF 3867 - 2.5 V, SINGLE 10-BIT, 2-PORT, DDR FET SWITCH
Pages: 10
Publication date: 2001-11-01
STANDARD FOR DESCRIPTION OF 3877 - 2.5 V, DUAL 5-BIT, 2-PORT, DDR FET SWITCH
STANDARD DESCRIPTION OF 1.5 V CMOS LOGIC DEVICES
Pages: 8
Publication date: 2001-08-01
DESCRIPTION OF 1.8 V CMOS LOGIC DEVICES
Publication date: 2000-04-01
STANDARD FOR DESCRIPTION OF FAST CMOS TTL COMPATIBLE LOGIC
Pages: 44
Publication date: 1993-01-01
STANDARD FOR DESCRIPTION OF 54/74ACXXXXX AND 54/74ACTXXXXX ADVANCED HIGH-SPEED CMOS DEVICES
Pages:
Publication date: 1990-09-01
STANDARD FOR DESCRIPTION OF 54/74HCXXXX AND 54/74HCTXXXX HIGH SPEED CMOS DEVICES
Pages: 97
Publication date: 1986-08-01
