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JEDEC JESD 82-28A

FULLY BUFFERED DIMM DESIGN FOR TEST, DESIGN FOR VALIDATION (DFx)

Pages: 106
Publication date: 2008-07-01
Price: 163 vnd

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This FBDIMM DFx document covers Design for Test, Design for Manufacturing and Design for Validation (DFx) requirements and implementation guidelines for Fully Buffered DIMM technology.
Document identifier
JEDEC JESD 82-28A
Title
FULLY BUFFERED DIMM DESIGN FOR TEST, DESIGN FOR VALIDATION (DFx)
JEDEC Category
JC-40.5: Logic Validation and Verification
Publication date
2008-07-01
Status
Effective
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Cross references
Latest version
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Keywords
Classification
Pages
106
Price 163 vnd

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