This standard defines the DC and AC operating conditions, I/O impedances, termination characteristics, and compliance test methods of I/O drivers and receivers used in multi-wire, multi-level signaling interfaces. The multi-wire interfaces defined by this specification all utilize quaternary signal levels.
Document identifier
JEDEC JESD247
Title
Multi-wire Multi-level I/O Standard
JEDEC Category
JC-25: Transistors
Publication date
2016-06-01
International Relationship
| Price |
67 vnd |
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