This standard defines power supply voltage range, dc interface, switching parameter and overshoot/undershoot for high speed low voltage swing terminated NMOS driver family digital circuits. The specifications in this standard represent a minimum set of interface specifications for low voltage terminated circuits. Item 159.03
Document identifier
JEDEC JESD8-33
Title
.05 Low Voltage Swing Terminated Logic (LVSTL05)
JEDEC Category
JC-16: Interface Technology
Publication date
2019-06-01
International Relationship
| Price |
20 vnd |
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