This standard defines the dc and ac input levels, output levels, and input overshoot and undershoot specifications for the 1.8 V High-speed LVCMOS (HS_LVCMOS) interface. The non-terminated interface has a switching range that is nominally expected to be 0 V to 1.8 V.
Document identifier
JEDEC JESD8-31
Title
1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE
JEDEC Category
JC-14.1: Reliability Test Methods for Packaged Devices
Publication date
2018-03-01
International Relationship
| Price |
48 vnd |
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