This standard defines standard specifications of DC interface parameters, switching parameters, and test loading for definition of the SSTU32S869 and SSTU32D869 registered buffer with parity for driving heavy load on high-density DDR2 RDIMM applications. A typical application would be a 36 SDRAM planar DIMM. The purpose is to provide a standard for the SSTU32S869 and SSTU32D869 logic devices, for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
Document identifier
JEDEC JESD 82-12A
Title
DEFINITION OF THE SSTU32S869 & SSTU32D869 REGISTERED BUFFER WITH PARITY FOR DDR2 RDIMM APPLICATIONS
JEDEC Category
JC-40: Digital Logic
Publication date
2007-04-01
International Relationship
| Price |
74 vnd |
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